Tracking Loops: DLL, PLL and FLL Explained

Introduction

Once a GNSS receiver acquires a satellite signal, three feedback control loops work in concert to maintain continuous, precise measurements: the Delay Lock Loop (DLL) tracks the code phase, the Phase Lock Loop (PLL) tracks the carrier phase, and the Frequency Lock Loop (FLL) provides a more robust alternative to PLL under dynamic stress. Understanding how these loops work - and the trade-offs in their design - is fundamental to understanding why GNSS receivers behave as they do under different conditions.

Key Concept: Tracking loops are feedback control systems. A narrow loop bandwidth gives precise, low-noise measurements but is slow to respond to dynamics and may lose lock in motion. A wide bandwidth tracks dynamics well but lets in more noise, degrading measurement precision.

The Delay Lock Loop (DLL)

The DLL maintains alignment between the incoming PRN code and a locally generated replica. The key component is the early-minus-late discriminator:

Three correlators sample the incoming signal at the code phase estimated by the loop (Prompt), half a chip early (Early), and half a chip late (Late).
When the local code replica is perfectly aligned with the incoming code, the Early and Late correlator outputs are equal. Any misalignment creates a nonzero Early-minus-Late difference - the discriminator output.
The discriminator drives a loop filter, which commands the code numerically-controlled oscillator (NCO) to advance or retard the local code until the discriminator output returns to zero.

The DLL output is the code phase - from which the pseudorange is derived by multiplying by the speed of light and adding the receiver clock error. DLL pseudorange noise is typically 0.2 to 0.5 metres under open-sky conditions for GPS L1 C/A.

Early-Late Spacing and Multipath Sensitivity

The early-late chip spacing (the distance between Early and Late correlators, often denoted d) controls the DLL multipath sensitivity. A spacing of d = 1 chip (full chip) is most sensitive to multipath because the correlation triangle is wider, allowing reflected signals arriving up to one chip late to affect the discriminator output. Narrow correlators (d = 0.1 chip) reduce multipath sensitivity but require wider front-end bandwidth to resolve the sharper correlation features of newer signals like GPS L5.

The Phase Lock Loop (PLL)

The PLL is the most precision-critical tracking loop. It tracks the carrier phase of the incoming signal, providing measurements with noise of approximately 1 to 5 mm RMS under good conditions - orders of magnitude more precise than the DLL code-phase measurements. The PLL operates by comparing the phase of the incoming carrier with a locally generated carrier NCO and driving the phase error to zero.

PLL loop bandwidth is a critical design parameter:

Narrow bandwidth (1 to 5 Hz): Filters out most noise, minimising carrier-phase measurement error. But the loop responds slowly to dynamics - a receiver in a rapidly accelerating vehicle may experience stress that causes the PLL to lose lock (cycle slip).
Wide bandwidth (10 to 20 Hz): Tracks high dynamics reliably but passes more noise, degrading carrier-phase precision.

Note: A cycle slip occurs when the PLL loses and re-acquires phase lock, introducing an integer number of carrier wavelength jumps into the carrier-phase measurement. Cycle slips contaminate precise positioning solutions and must be detected and repaired before ambiguity resolution.

The Frequency Lock Loop (FLL)

The FLL tracks carrier frequency rather than phase. It is more robust than the PLL under high dynamics, low signal strength, and interference - because frequency can be estimated from shorter data intervals and does not require maintaining phase coherence. However, FLL measurements are only as precise as Doppler frequency measurements (approximately centimetric per second velocity), not the millimetre-level precision of PLL carrier-phase.

Many receivers use an FLL-assisted-PLL architecture: the FLL runs continuously to maintain frequency lock even during brief signal outages, while the PLL overlays phase tracking during stable conditions. This combination provides both dynamic robustness and carrier-phase precision.

Costas Loop for Data-Modulated Signals

GPS L1 C/A and similar data-modulated signals have 180-degree phase reversals at each navigation message data bit boundary. A standard PLL cannot tolerate these phase reversals - they appear as phase errors and destabilise the loop. The Costas loop, a phase detector based on the product of in-phase and quadrature correlator outputs, is insensitive to 180-degree phase transitions and is therefore used for data-modulated signal tracking. Modern pilot channels (GPS L5Q, Galileo E1C) carry no data bits, allowing a conventional PLL to be used with narrow bandwidth and extended coherent integration.

Loop Performance Summary

Loop	Tracks	Precision	Dynamic Robustness	Primary Use
DLL	Code phase (pseudorange)	0.2 to 0.5 m	Good	Position fix, ambiguity search initialisation
PLL / Costas	Carrier phase	1 to 5 mm	Moderate	RTK, PPK, PPP carrier-phase measurements
FLL	Carrier frequency (Doppler/velocity)	cm/s	Excellent	High-dynamics, weak signal, FLL-assisted PLL

Summary

The DLL, PLL, and FLL are the heart of every GNSS receiver. Their loop bandwidths, discriminator designs, and interaction determine the fundamental trade-off between noise and dynamic performance. Narrow bandwidths provide the millimetre-level carrier-phase precision that RTK and PPP require, while wider bandwidths and FLL assistance maintain tracking under the stresses of vehicle dynamics and urban signal fading. The next lesson examines how measurements from these loops are further refined through filtering to deliver the final position solution.